Fix the issue of on x86_64, rhel4 can not get into runlevel 5.

Xserver will scan pci and the cirrus VGA driver will register
mmio each time, cause mmio array out of space.

Signed-off-by: Xiaofeng Ling <xiaofeng.ling@intel.com>

diff --git a/tools/ioemu/exec.c b/tools/ioemu/exec.c
index de0618b09e4d5e9473276d5241e57c631aa45676..195c358296fc16ab66f64a83e41b1bc6b4cd96b0 100644 (file)
--- a/tools/ioemu/exec.c
+++ b/tools/ioemu/exec.c
@@ -262,13 +262,24 @@ void cpu_register_physical_memory(target_phys_addr_t start_addr,
                                   unsigned long size,
                                   unsigned long phys_offset)
 {
-        if (mmio_cnt == MAX_MMIO) {
-                fprintf(logfile, "too many mmio regions\n");
-                exit(-1);
+    int i;
+
+    for (i = 0; i < mmio_cnt; i++) { 
+        if(mmio[i].start == start_addr) {
+            mmio[i].io_index = phys_offset;
+            mmio[i].size = size;
+            return;
         }
-        mmio[mmio_cnt].io_index = phys_offset;
-        mmio[mmio_cnt].start = start_addr;
-        mmio[mmio_cnt++].size = size;
+    }
+
+    if (mmio_cnt == MAX_MMIO) {
+        fprintf(logfile, "too many mmio regions\n");
+        exit(-1);
+    }
+
+    mmio[mmio_cnt].io_index = phys_offset;
+    mmio[mmio_cnt].start = start_addr;
+    mmio[mmio_cnt++].size = size;
 }
 
 /* mem_read and mem_write are arrays of functions containing the